In the field of semiconductor device processing, there has been a trend to reduce the size of features in integrated circuit devices, including metal interconnect lines therein. Due to such decreases in feature size, metal interconnect lines in integrated circuit devices have smaller cross-sectional areas and must therefore carry higher current densities. Carrying higher current densities increases the occurrence of electromigration in such interconnect lines. Consequently, electromigration is becoming an increasingly common failure mechanism in integrated circuit devices as the feature sizes in such devices become smaller.
Electromigration is observed as a transport of the metal material of a metal interconnect line caused by the transfer of momentum from the electrons flowing in the interconnect line to the metal ions therein. Electromigration can cause a metal layer interconnect line to fail when the transport of metal material creates a void or break in the interconnect line. Electromigration can also cause dislodged metal material in the metal layer interconnect line to accumulate so as to form bulges sufficiently large to make undesired electrical contact with an adjacent interconnect line. These failures occur most often when electron transport takes place parallel to grain boundaries in the metal layer of an interconnect line since grain boundaries can provide channels for the transport of dislodged metal ions.
The problem of failures in metal layer interconnect lines caused by electromigration may be alleviated by increasing the size of the grains in the metal layer interconnect lines so as to reduce the total grain boundary density along the direction of electron transport in the metal layer interconnect lines and to control the orientations of grain boundaries so as to form large angles (ideally 90°) with respect to the direction of electron transport.
In addition to alleviating the problem of electromigration in metal layer interconnect lines in integrated circuit devices, there is a general need in other applications for thin metal layers having higher conductance and greater mechanical strength, which may be obtained by increasing the grain size, and controlling the locations and orientations of grain boundaries in the metal layer. Accordingly, a need clearly exists for a method and apparatus for controlling grain size, grain shape, and the locations and orientations of grain boundaries in a metal layer, including metal layer interconnect lines in integrated circuit devices.